deploy

app/src/Canvas.tsx

@@ -13,7 +13,7 @@ function Canvas({ editor, canvasRef }: Props): ReactElement {
       editor.render(canvasRef.current);
     }
 
-    const unsubscribe = editor.events.subscribe(["RenderRequest"], (ev) => {
+    const unsubscribe = editor.events.subscribe(["RenderRequest"], (_ev) => {
       if (canvasRef.current) {
         editor.render(canvasRef.current);
       }

app/src/editor/Editor.ts

@@ -1,4 +1,4 @@
-import { Board, Component, ComponentRepo } from "./Board";
+import { Component } from "./Board";
 import { SelectionBox } from "./SelectionBox";
 import { ComponentPlacer } from "./ComponentPlacer";
 import { Selection } from "./Selection";
@@ -11,8 +11,6 @@ import { ViewPos } from "./ViewPos";
 import { type ComponentKind } from "./Board";
 import type { EventUnsub } from "./events";
 import { Project } from "./Project";
-import * as ir from "./ir";
-import { Sim } from "./sim";
 
 export class Editor {
   public events = new EventBus();

app/src/editor/Project.ts

@@ -1,4 +1,4 @@
-import { Board, Component, ComponentRepo } from "./Board";
+import { Board, ComponentRepo } from "./Board";
 import { type EventBus } from "./events";
 import * as ser from "./serialize";
 

docs/case_description.md

@@ -16,4 +16,15 @@ Because logic circuits can be used for simulations, they can also enable testing
 For this purpose, we would like a software solution that enables us as chip manufacturers to design and specify logic circuits as to simulate hardware chips to run embedded software. The circuits should be specified by assembling logic gates. We would like a visual tool for assembling and organizing logic gates. The tool should be able to simulate a specified circuit. We want the simulation to be a live simulation, were we can interactively test software and interact with the circuit.
 
 
+## Case 1: Demonstrate the behavoir of a 4-bit full adder
+
+Chip development involved designing the schematic of various complex logic components. One such component could be a 4-bit full adder. The simulator needs to be able to demonstrate that the behavior of a specific schematic for complex component, in this case a 4-bit full adder, is correct and will work in practice.
+
+Given a schematic of a 4-bit full adder, the system has to provide functionality to wire together components according to the schematic. When the circuit wiring is done, the system has simulate the behavior of the component correctly and interactively. The simulator should demonstrate the the 4-bit full adder can add numbers correctly, for example that 3 + 5 = 8.
+
+## Case 2: Demonstrate the correctness of a piece of microcode for a 7-segment display encoder
+
+Often, a chip needs certain programs of microcode. Microcode are pieces of code or data that are used internally in chips. A schematic of a 7-segment display encoder can utilize a ROM component for the encoding itself. ROM (read-only memory) components, and memory components generally, function by associating address bits with data bits. A 7-segment display (in this instance) takes as input the state of each of the 7 segments.
+
+Using 2 4-bit ROM components (4-bit address and value) an encoder can be made that translates the binary bit values of the integers 0 to 15 to their corrosponding 7-segment pin combinations. The system has to provide functionality for such a component to be designed so that microcode can be tested on it.
 

docs/requirement_specification.md

@@ -3,11 +3,11 @@
 
 **NandSim** - A tool for specifying and simulating integrated circuits with logic gates.
 
-The customer is an integrated circuit chip (ICC) manufacturer. The tool is to be designed used for software developers and as an interaction point between hardware developers and software developers. See the [case description](./case_description.md).
+The customer is an integrated circuit chip (IC) manufacturer. The tool is to be designed used for software developers and as an interaction point between hardware developers and software developers. See the [case description](./case_description.md).
 
 The solution is a visual tool, that both software and hardware developers can use to build and simulate logic circuit models. The models consist of assembled logic gates. To organize complicated logic, the gates of the circuits can be organized into reusable component. The tool can simulate the modelled circuits in an interactive live simulation. Software developers should be able to develop software targetting the modelled circuits, and further be able to execute and test code in the simulation.
 
-The goal is a tool that enable ICC manufacturers, specifically software and hardware developers to design and develop circuit models and embedded software, as to reduce the development time for an ICC solution, by decoupling the software and hardware development processes.
+The goal is a tool that enable IC manufacturers, specifically software and hardware developers to design and develop circuit models and embedded software, as to reduce the development time for an IC solution, by decoupling the software and hardware development processes.
 
 ## Requirements
 
@@ -27,9 +27,14 @@ As a developer using this solution, I should be able to:
 
 ## Non-functional requirements
 
-TBD
+The system should conform to the non-functional requirements of:
+
+- **simulating interactively without unreasonable delay.** The system should be able to simulate any circuit with less than 100 components in less than 500 milliseconds on modern hardware.
+- **preventing loss of work.** The system should employ a strategy to save the user's progress frequently enough, so that work is never lost. Immediately following any significant change, the system should be able to restart without loss of work.
 
 ## Delimination
 
-TBD
+For simplicity, both of use and of implementation, the solution will be a digital logic simulator. This is an abstraction removed from simulating electrical current in circuits with resistors, capacetors, etc. This limits the tool in terms of it's applicability while still being suited for the case description.
+
+The simulator will not handle unstable circuits. If a circuit contains a cycling connection in such a way that the circuit vascillates indefinitely, the circuit is said to be unstable. A general solution to detect unstable circuits ahead of time is mathematically impossible due to the halting problem, and heuristics-based detection methods come with their own complexity. It's decided that the simulator simply doesn't support unstable circuits, and it's thus the user's responsibility ensure that circuits are stable.