more instruction combinations

This commit is contained in:
sfja 2025-03-31 22:56:51 +02:00
parent 1afdc0db58
commit 804d3c5398
3 changed files with 57 additions and 0 deletions

View File

@ -430,6 +430,17 @@ uint16_t assemble_to_binary(uint16_t* out, const Line* lines, size_t lines_size)
ADD_LABEL(dst); ADD_LABEL(dst);
break; break;
} }
case LineTy_In_Reg: {
uint16_t dst = line->dst.reg;
uint16_t op1 = line->op1.reg;
uint32_t ins = Op_In;
add_op1_reg(&ins, op1);
add_dst_reg(&ins, dst);
out[ip++] = (uint16_t)ins;
break;
}
case LineTy_In_Imm: { case LineTy_In_Imm: {
uint16_t dst = line->dst.reg; uint16_t dst = line->dst.reg;
uint16_t op1 = line->op1.imm; uint16_t op1 = line->op1.imm;
@ -442,6 +453,15 @@ uint16_t assemble_to_binary(uint16_t* out, const Line* lines, size_t lines_size)
out[ip++] = op1; out[ip++] = op1;
break; break;
} }
case LineTy_Call_Reg: {
uint16_t op1 = line->op1.reg;
uint32_t ins = Op_Call;
add_op1_reg(&ins, op1);
out[ip++] = (uint16_t)ins;
break;
}
case LineTy_Call_Imm: { case LineTy_Call_Imm: {
uint16_t op1 = line->op1.imm; uint16_t op1 = line->op1.imm;
@ -467,6 +487,15 @@ uint16_t assemble_to_binary(uint16_t* out, const Line* lines, size_t lines_size)
out[ip++] = (uint16_t)ins; out[ip++] = (uint16_t)ins;
break; break;
} }
case LineTy_Lit_Reg: {
uint16_t op1 = line->op1.reg;
uint32_t ins = Op_Lit;
add_op1_reg(&ins, op1);
out[ip++] = (uint16_t)ins;
break;
}
case LineTy_Lit_Imm: { case LineTy_Lit_Imm: {
uint16_t op1 = line->op1.imm; uint16_t op1 = line->op1.imm;

View File

@ -38,10 +38,13 @@ typedef enum {
LineTy_Mov16_MemImm_Reg, LineTy_Mov16_MemImm_Reg,
LineTy_Mov16_MemImm_Imm, LineTy_Mov16_MemImm_Imm,
LineTy_Mov16_MemLabel_Reg, LineTy_Mov16_MemLabel_Reg,
LineTy_In_Reg,
LineTy_In_Imm, LineTy_In_Imm,
LineTy_Call_Reg,
LineTy_Call_Imm, LineTy_Call_Imm,
LineTy_Call_Label, LineTy_Call_Label,
LineTy_Ret, LineTy_Ret,
LineTy_Lit_Reg,
LineTy_Lit_Imm, LineTy_Lit_Imm,
LineTy_Lit_Label, LineTy_Lit_Label,
LineTy_Int, LineTy_Int,
@ -138,10 +141,13 @@ Line s_mov16_mr_i(Reg dst_reg, uint16_t dst_offset, uint16_t op2_imm);
Line s_mov16_mi_r(uint16_t dst_imm, Reg op2_reg); Line s_mov16_mi_r(uint16_t dst_imm, Reg op2_reg);
Line s_mov16_mi_i(uint16_t dst_imm, uint16_t op2_imm); Line s_mov16_mi_i(uint16_t dst_imm, uint16_t op2_imm);
Line s_mov16_ml_r(int dst_label, Reg op2_reg); Line s_mov16_ml_r(int dst_label, Reg op2_reg);
Line s_in_r(Reg dst_reg, Reg op1_reg);
Line s_in_i(Reg dst_reg, uint16_t op1_imm); Line s_in_i(Reg dst_reg, uint16_t op1_imm);
Line s_call_r(Reg op1_reg);
Line s_call_i(uint16_t op1_imm); Line s_call_i(uint16_t op1_imm);
Line s_call_l(int op1_label); Line s_call_l(int op1_label);
Line s_ret(void); Line s_ret(void);
Line s_lit_r(Reg op1_reg);
Line s_lit_i(uint16_t op1_imm); Line s_lit_i(uint16_t op1_imm);
Line s_lit_l(int op1_label); Line s_lit_l(int op1_label);
Line s_int(uint8_t int_id); Line s_int(uint8_t int_id);

View File

@ -254,6 +254,14 @@ Line s_mov16_ml_r(int dst_label, Reg op2_reg)
.op2 = (Ex) { .reg = (uint16_t)op2_reg }, .op2 = (Ex) { .reg = (uint16_t)op2_reg },
}; };
} }
Line s_in_r(Reg dst_reg, Reg op1_reg)
{
return (Line) {
.ty = LineTy_In_Reg,
.dst = (Ex) { .reg = (uint16_t)dst_reg },
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
};
}
Line s_in_i(Reg dst_reg, uint16_t op1_imm) Line s_in_i(Reg dst_reg, uint16_t op1_imm)
{ {
return (Line) { return (Line) {
@ -262,6 +270,13 @@ Line s_in_i(Reg dst_reg, uint16_t op1_imm)
.op1 = (Ex) { .imm = op1_imm }, .op1 = (Ex) { .imm = op1_imm },
}; };
} }
Line s_call_r(Reg op1_reg)
{
return (Line) {
.ty = LineTy_Call_Reg,
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
};
}
Line s_call_i(uint16_t op1_imm) Line s_call_i(uint16_t op1_imm)
{ {
return (Line) { return (Line) {
@ -280,6 +295,13 @@ Line s_ret(void)
{ {
return (Line) { .ty = LineTy_Ret }; return (Line) { .ty = LineTy_Ret };
} }
Line s_lit_r(Reg op1_reg)
{
return (Line) {
.ty = LineTy_Lit_Imm,
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
};
}
Line s_lit_i(uint16_t op1_imm) Line s_lit_i(uint16_t op1_imm)
{ {
return (Line) { return (Line) {