654 lines
17 KiB
C
654 lines
17 KiB
C
#include "asm.h"
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#include "common/arch.h"
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#include <stdint.h>
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Line s_label(int label)
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{
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return (Line) {
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.ty = LineTy_Label,
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.op1 = (Ex) { .label = label },
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};
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}
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Line s_data_i(uint16_t data)
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{
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return (Line) {
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.ty = LineTy_DataImm,
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.op1 = (Ex) { .imm = data },
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};
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}
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Line s_data_l(int label)
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{
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return (Line) {
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.ty = LineTy_DataLabel,
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.op1 = (Ex) { .label = label },
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};
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}
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Line s_nop(void)
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{
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return (Line) { .ty = LineTy_Nop };
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}
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Line s_hlt(void)
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{
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return (Line) { .ty = LineTy_Hlt };
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}
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Line s_jmp_r(Reg op1_reg)
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{
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return (Line) {
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.ty = LineTy_Jmp_Reg,
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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};
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}
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Line s_jmp_i(uint16_t op1_imm)
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{
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return (Line) {
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.ty = LineTy_Jmp_Imm,
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.op1 = (Ex) { .imm = op1_imm },
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};
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}
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Line s_jmp_l(int op1_label)
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{
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return (Line) {
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.ty = LineTy_Jmp_Label,
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.op1 = (Ex) { .label = op1_label },
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};
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}
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Line s_jnz_r(Reg op1_reg, Reg op2_reg)
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{
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return (Line) {
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.ty = LineTy_Jnz_Reg,
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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};
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}
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Line s_jnz_i(Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Jnz_Imm,
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_jnz_l(Reg op1_reg, int op2_label)
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{
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return (Line) {
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.ty = LineTy_Jnz_Label,
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.op2 = (Ex) { .label = op2_label },
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};
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}
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Line s_cmp_r(Reg op1_reg, Reg op2_reg)
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{
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return (Line) {
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.ty = LineTy_Cmp_Reg,
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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};
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}
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Line s_cmp_i(Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Cmp_Imm,
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_cmp_l(Reg op1_reg, int op2_label)
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{
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return (Line) {
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.ty = LineTy_Cmp_Label,
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .label = op2_label },
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};
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}
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Line s_mov8_r_r(Reg dst_reg, Reg op2_reg)
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{
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return (Line) {
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.ty = LineTy_Mov8_Reg_Reg,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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};
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}
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Line s_mov8_r_i(Reg dst_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Mov8_Reg_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_mov8_r_mr(Reg dst_reg, Reg op2_reg, uint16_t op2_offset)
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{
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return (Line) {
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.ty = LineTy_Mov8_Reg_MemReg,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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.offset = op2_offset,
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};
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}
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Line s_mov8_r_mi(Reg dst_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Mov8_Reg_MemImm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_mov8_mr_r(Reg dst_reg, Reg op2_reg)
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{
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return (Line) {
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.ty = LineTy_Mov8_MemReg_Reg,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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};
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}
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Line s_mov8_mr_i(Reg dst_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Mov8_MemReg_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_mov8_mi_r(uint16_t dst_imm, Reg op2_reg)
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{
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return (Line) {
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.ty = LineTy_Mov8_MemImm_Reg,
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.dst = (Ex) { .imm = dst_imm },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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};
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}
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Line s_mov8_mi_i(uint16_t dst_imm, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Mov8_MemImm_Imm,
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.dst = (Ex) { .imm = dst_imm },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_mov16_r_r(Reg dst_reg, Reg op2_reg)
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{
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return (Line) {
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.ty = LineTy_Mov16_Reg_Reg,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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};
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}
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Line s_mov16_r_i(Reg dst_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Mov16_Reg_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_mov16_r_l(Reg dst_reg, int op2_label)
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{
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return (Line) {
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.ty = LineTy_Mov16_Reg_Label,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .label = op2_label },
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};
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}
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Line s_mov16_r_mr(Reg dst_reg, Reg op2_reg, uint16_t op2_offset)
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{
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return (Line) {
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.ty = LineTy_Mov16_Reg_MemReg,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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.offset = op2_offset,
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};
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}
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Line s_mov16_r_mi(Reg dst_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Mov16_Reg_MemImm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_mov16_r_ml(Reg dst_reg, int op2_label)
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{
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return (Line) {
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.ty = LineTy_Mov16_Reg_MemLabel,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .label = op2_label },
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};
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}
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Line s_mov16_mr_r(Reg dst_reg, uint16_t dst_offset, Reg op2_reg)
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{
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return (Line) {
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.ty = LineTy_Mov16_MemReg_Reg,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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.offset = dst_offset,
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};
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}
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Line s_mov16_mr_i(Reg dst_reg, uint16_t dst_offset, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Mov16_MemReg_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op2 = (Ex) { .imm = op2_imm },
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.offset = dst_offset,
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};
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}
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Line s_mov16_mi_r(uint16_t dst_imm, Reg op2_reg)
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{
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return (Line) {
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.ty = LineTy_Mov16_MemImm_Reg,
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.dst = (Ex) { .imm = dst_imm },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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};
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}
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Line s_mov16_mi_i(uint16_t dst_imm, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Mov16_MemImm_Imm,
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.dst = (Ex) { .imm = dst_imm },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_mov16_ml_r(int dst_label, Reg op2_reg)
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{
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return (Line) {
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.ty = LineTy_Mov16_MemLabel_Reg,
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.dst = (Ex) { .label = dst_label },
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.op2 = (Ex) { .reg = (uint16_t)op2_reg },
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};
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}
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Line s_in_r(Reg dst_reg, Reg op1_reg)
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{
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return (Line) {
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.ty = LineTy_In_Reg,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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};
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}
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Line s_in_i(Reg dst_reg, uint16_t op1_imm)
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{
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return (Line) {
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.ty = LineTy_In_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .imm = op1_imm },
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};
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}
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Line s_call_r(Reg op1_reg)
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{
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return (Line) {
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.ty = LineTy_Call_Reg,
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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};
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}
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Line s_call_i(uint16_t op1_imm)
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{
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return (Line) {
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.ty = LineTy_Call_Imm,
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.op1 = (Ex) { .imm = op1_imm },
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};
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}
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Line s_call_l(int op1_label)
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{
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return (Line) {
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.ty = LineTy_Call_Label,
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.op1 = (Ex) { .label = op1_label },
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};
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}
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Line s_ret(void)
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{
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return (Line) { .ty = LineTy_Ret };
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}
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Line s_lit_r(Reg op1_reg)
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{
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return (Line) {
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.ty = LineTy_Lit_Imm,
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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};
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}
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Line s_lit_i(uint16_t op1_imm)
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{
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return (Line) {
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.ty = LineTy_Lit_Imm,
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.op1 = (Ex) { .imm = op1_imm },
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};
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}
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Line s_lit_l(int op1_label)
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{
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return (Line) {
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.ty = LineTy_Lit_Label,
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.op1 = (Ex) { .label = op1_label },
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};
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}
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Line s_int(uint8_t int_id)
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{
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return (Line) {
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.ty = LineTy_Int,
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.op1 = (Ex) { .imm = int_id },
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};
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}
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Line s_iret(void)
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{
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return (Line) { .ty = LineTy_IRet };
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}
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Line s_or_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Or_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_xor_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Xor_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_and_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_And_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_shl_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Shl_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_rshl_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_RShl_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_shr_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Shr_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_rshr_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_RShr_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_add_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Add_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_sub_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Sub_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_rsub_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_RSub_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_mul_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Mul_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_imul_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_IMul_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_div_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_Div_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_idiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_IDiv_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
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};
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}
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Line s_rdiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
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{
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return (Line) {
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.ty = LineTy_RDiv_Imm,
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.dst = (Ex) { .reg = (uint16_t)dst_reg },
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.op1 = (Ex) { .reg = (uint16_t)op1_reg },
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.op2 = (Ex) { .imm = op2_imm },
|
|
};
|
|
}
|
|
Line s_ridiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_RIDiv_Imm,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .imm = op2_imm },
|
|
};
|
|
}
|
|
Line s_mod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Mod_Imm,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .imm = op2_imm },
|
|
};
|
|
}
|
|
Line s_rmod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_RMod_Imm,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .imm = op2_imm },
|
|
};
|
|
}
|
|
Line s_or_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Or_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_xor_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Xor_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_and_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_And_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_shl_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Shl_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_rshl_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_RShl_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_shr_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Shr_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_rshr_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_RShr_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_add_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Add_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_sub_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Sub_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_rsub_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_RSub_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_mul_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Mul_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_imul_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_IMul_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_div_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Div_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_idiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_IDiv_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_rdiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_RDiv_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_ridiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_RIDiv_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_mod_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_Mod_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|
|
Line s_rmod_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
|
|
{
|
|
return (Line) {
|
|
.ty = LineTy_RMod_Reg,
|
|
.dst = (Ex) { .reg = (uint16_t)dst_reg },
|
|
.op1 = (Ex) { .reg = (uint16_t)op1_reg },
|
|
.op2 = (Ex) { .reg = (uint16_t)op2_reg },
|
|
};
|
|
}
|