556 lines
16 KiB
C
556 lines
16 KiB
C
#include "vm.h"
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#include "common/arch.h"
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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typedef struct {
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uint16_t regs[10];
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uint8_t* mem;
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Drive* boot_drive;
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uint16_t seg_count;
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uint16_t seg_size;
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IODevice* io_device;
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uint16_t int_table;
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int interrupt_timeout;
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uint16_t keyboard_port_input;
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} VM;
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static inline void run_arithm_ins(VM* vm, uint16_t ins);
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static inline void handle_device_read(VM* vm, Reg dst_reg, uint16_t device_id);
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static inline void handle_device_write(
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VM* vm, uint16_t op1, uint16_t device_id);
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static inline int handle_interrupt(VM* vm, uint8_t int_id);
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static inline int jump_to_interrupt_handler(VM* vm, uint8_t int_id);
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static inline void maybe_update_vcd(VM* vm, uint16_t addr);
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static inline uint16_t eat_uint16(VM* vm);
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static inline uint16_t read_seg_uint16(VM* vm, uint16_t ptr);
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static inline Op ins_op(uint16_t ins);
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static inline Reg ins_dst_reg(uint16_t ins);
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static inline Reg ins_op1_reg(uint16_t ins);
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static inline Reg ins_op2_reg(uint16_t ins);
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static inline uint16_t ins_op1(VM* vm, uint16_t ins);
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static inline uint16_t ins_op2(VM* vm, uint16_t ins);
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static inline uint16_t ins_reg_val_or_imm(
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VM* vm, uint16_t ins, uint16_t is_imm_bit, uint16_t reg_bit, uint16_t mask);
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static inline uint16_t ins_op1_or_imm(VM* vm, uint16_t ins);
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static inline uint16_t ins_op2_or_imm(VM* vm, uint16_t ins);
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void vm_start(Drive* boot_drive, IODevice* io_device)
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{
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const uint16_t seg_count = 16;
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const uint16_t seg_size = 4096;
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VM vm_inst = {
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.regs = { 0 },
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.mem = calloc(seg_count * seg_size, sizeof(uint8_t)),
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.boot_drive = boot_drive,
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.seg_count = seg_count,
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.seg_size = seg_size,
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.io_device = io_device,
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.int_table = 0,
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.interrupt_timeout = 10,
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.keyboard_port_input = 0,
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};
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VM* vm = &vm_inst;
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uint16_t* rbp = &vm->regs[Rbp];
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uint16_t* rsp = &vm->regs[Rsp];
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uint16_t* rfl = &vm->regs[Rfl];
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uint16_t* rip = &vm->regs[Rip];
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uint16_t* rcs = &vm->regs[Rcs];
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const uint16_t bootloader_size = 512;
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const uint16_t block_size = vm->boot_drive->block_size;
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for (uint16_t i = 0; i * block_size < bootloader_size; ++i) {
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vm->boot_drive->read(vm->boot_drive, &vm->mem[i * block_size], i);
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}
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while (true) {
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uint16_t ins = eat_uint16(vm);
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Op op = ins_op(ins);
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// printf("[%3d] = %3d %s\n", *rip - 2, op, op_str(op));
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if (*rip >= 1024) {
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printf("killed: rip >= 1024\n");
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exit(0);
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}
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switch (op) {
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case Op_Nop:
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break;
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case Op_Hlt:
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vm->io_device->wait_for_interrupt(vm->io_device);
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vm->interrupt_timeout = 0;
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break;
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case Op_Jmp: {
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bool is_farjump = ins >> 7 & 1;
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if (is_farjump) {
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uint16_t cs = ins_reg_val_or_imm(vm, ins, 8, 13, 0x7);
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uint16_t op1 = ins_op1_or_imm(vm, ins);
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*rcs = cs;
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*rip = op1;
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} else {
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uint16_t op1 = ins_op1_or_imm(vm, ins);
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*rip = op1;
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}
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break;
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}
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case Op_Jnz: {
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uint16_t op1 = ins_op1(vm, ins);
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uint16_t op2 = ins_op2_or_imm(vm, ins);
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if (op1 != 0) {
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*rip = op2;
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}
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break;
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}
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case Op_Test: {
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uint16_t op1 = ins_op1(vm, ins);
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if (op1 == 0) {
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*rfl |= 1u << Fl_Zero;
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} else {
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*rfl &= (uint16_t)~(1u << Fl_Zero);
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}
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break;
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}
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case Op_Cmp: {
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uint16_t op1 = ins_op1(vm, ins);
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uint16_t op2 = ins_op2_or_imm(vm, ins);
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if (op1 == op2) {
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*rfl |= 1u << Fl_Eq;
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} else {
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*rfl &= (uint16_t)~(1u << Fl_Eq);
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}
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if (op1 < op2) {
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*rfl |= 1u << Fl_Be;
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} else {
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*rfl &= (uint16_t)~(1u << Fl_Be);
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}
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if ((int16_t)op1 < (int16_t)op2) {
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*rfl |= 1u << Fl_Lt;
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} else {
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*rfl &= (uint16_t)~(1u << Fl_Lt);
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}
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break;
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}
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case Op_Mov8: {
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bool is_memory = ins >> 10 & 1;
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bool addr_is_reg = ins >> 11 & 1;
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bool is_store = ins >> 12 & 1;
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if (!is_memory) {
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uint16_t src = ins_reg_val_or_imm(vm, ins, 6, 7, 0xf);
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Reg dst = ins >> 12 & 0xf;
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vm->regs[dst] = (uint8_t)src;
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break;
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}
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uint16_t addr;
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if (addr_is_reg) {
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Reg reg = is_store ? ins_dst_reg(ins) : ins_op2_reg(ins);
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int16_t offset = (int16_t)eat_uint16(vm);
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addr = (uint16_t)((int16_t)vm->regs[reg] + offset);
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} else {
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addr = eat_uint16(vm);
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}
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if (is_store) {
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uint16_t src = ins_op2_or_imm(vm, ins);
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vm->mem[addr] = (uint8_t)src;
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maybe_update_vcd(vm, addr);
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} else {
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Reg reg = is_store ? ins_op2_reg(ins) : ins_dst_reg(ins);
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vm->regs[reg] = (uint16_t)vm->mem[addr];
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}
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break;
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}
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case Op_Mov16: {
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bool is_memory = ins >> 10 & 1;
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bool addr_is_reg = ins >> 11 & 1;
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bool is_store = ins >> 12 & 1;
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if (!is_memory) {
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uint16_t src = ins_reg_val_or_imm(vm, ins, 6, 7, 0xf);
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Reg dst = ins >> 12 & 0xf;
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vm->regs[dst] = src;
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break;
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}
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uint16_t addr;
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if (addr_is_reg) {
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Reg reg = is_store ? ins_dst_reg(ins) : ins_op2_reg(ins);
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int16_t offset = (int16_t)eat_uint16(vm);
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addr = (uint16_t)((int16_t)vm->regs[reg] + offset);
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} else {
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addr = eat_uint16(vm);
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}
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if (addr % 2 != 0) {
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fprintf(stderr,
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"error: invalid address alignment, halting "
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"execution.\n");
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vm->regs[Rfl] |= 1 << Fl_Err;
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goto halt_execution;
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}
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if (is_store) {
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uint16_t src = ins_op2_or_imm(vm, ins);
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*(uint16_t*)(&vm->mem[addr]) = src;
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maybe_update_vcd(vm, addr);
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maybe_update_vcd(vm, addr + 1);
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} else {
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Reg reg = is_store ? ins_op2_reg(ins) : ins_dst_reg(ins);
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vm->regs[reg] = *(uint16_t*)(&vm->mem[addr]);
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}
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break;
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}
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case Op_In: {
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Reg dst_reg = ins_dst_reg(ins);
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uint16_t device_id = ins_op1_or_imm(vm, ins);
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handle_device_read(vm, dst_reg, device_id);
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break;
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}
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case Op_Out: {
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uint16_t op1 = ins_op2(vm, ins);
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uint16_t device_id = ins_op1_or_imm(vm, ins);
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handle_device_write(vm, op1, device_id);
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break;
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}
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case Op_Call: {
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bool is_far_call = ins >> 13 & 1;
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uint16_t op1 = ins_op1_or_imm(vm, ins);
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if (is_far_call) {
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uint16_t op2 = ins_reg_val_or_imm(vm, ins, 14, 7, 0x7);
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*rsp += 2;
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*(uint16_t*)&vm->mem[*rsp] = *rcs;
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*rsp += 2;
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*(uint16_t*)&vm->mem[*rsp] = *rip;
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*rip = op1;
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*rcs = op2;
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} else {
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*rsp += 2;
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*(uint16_t*)&vm->mem[*rsp] = *rip;
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*rip = op1;
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}
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break;
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}
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case Op_Ret: {
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bool is_far_return = ins >> 6 & 1;
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if (is_far_return) {
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*rip = *(uint16_t*)&vm->mem[*rsp];
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*rsp -= 2;
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*rcs = *(uint16_t*)&vm->mem[*rsp];
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*rsp -= 2;
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} else {
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*rip = *(uint16_t*)&vm->mem[*rsp];
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*rsp -= 2;
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}
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break;
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}
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case Op_Lit: {
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uint16_t op2 = ins_op1_or_imm(vm, ins);
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vm->int_table = op2;
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break;
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}
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case Op_Int: {
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uint8_t int_id = (uint8_t)(ins >> 8 & 0xff);
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int res = handle_interrupt(vm, int_id);
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if (res != 0) {
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goto halt_execution;
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}
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break;
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}
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case Op_Or:
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case Op_Xor:
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case Op_And:
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case Op_Shl:
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case Op_RShl:
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case Op_Shr:
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case Op_RShr:
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case Op_Add:
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case Op_Sub:
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case Op_RSub:
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case Op_Mul:
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case Op_IMul:
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case Op_Div:
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case Op_IDiv:
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case Op_RDiv:
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case Op_RIDiv:
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case Op_Mod:
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case Op_RMod:
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run_arithm_ins(vm, ins);
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break;
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}
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Interrupt interrupt
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= vm->io_device->maybe_next_interrupt(vm->io_device);
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switch (interrupt.type) {
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case InterruptType_None:
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break;
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case InterruptType_Shutdown:
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goto halt_execution;
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case InterruptType_KeyEvent: {
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if (vm->interrupt_timeout <= 0 && (*rfl >> Fl_Int & 1)) {
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int res = jump_to_interrupt_handler(vm, Int_Key);
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if (res != 0) {
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goto halt_execution;
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}
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vm->keyboard_port_input = interrupt.keycode;
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vm->interrupt_timeout = 10;
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}
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break;
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}
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}
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vm->interrupt_timeout -= 1;
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}
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halt_execution:
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return;
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}
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static inline void run_arithm_ins(VM* vm, uint16_t ins)
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{
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typedef uint16_t u;
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typedef int16_t s;
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Op op = ins_op(ins);
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uint16_t op1 = ins_op1(vm, ins);
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uint16_t op2 = ins_op2_or_imm(vm, ins);
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Reg dst_reg = ins_dst_reg(ins);
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uint16_t* dst = &vm->regs[dst_reg];
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switch (op) {
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case Op_Or:
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*dst = op1 | op2;
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break;
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case Op_Xor:
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*dst = op1 ^ op2;
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break;
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case Op_And:
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*dst = op1 & op2;
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break;
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case Op_Shl:
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*dst = (u)(op1 << op2);
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break;
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case Op_RShl:
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*dst = (u)(op2 << op1);
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break;
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case Op_Shr:
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*dst = (u)(op1 >> op2);
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break;
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case Op_RShr:
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*dst = (u)(op2 >> op1);
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break;
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case Op_Add:
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*dst = op1 + op2;
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break;
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case Op_Sub:
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*dst = op1 - op2;
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break;
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case Op_RSub:
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*dst = op2 - op1;
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break;
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case Op_Mul:
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*dst = op1 * op2;
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break;
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case Op_IMul:
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*dst = (u)((s)op1 * (s)op2);
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break;
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case Op_Div:
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*dst = op1 / op2;
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break;
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case Op_IDiv:
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*dst = (u)((s)op1 / (s)op2);
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break;
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case Op_RDiv:
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*dst = op2 / op1;
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break;
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case Op_RIDiv:
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*dst = (u)((s)op2 / (s)op1);
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break;
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case Op_Mod:
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*dst = op1 % op2;
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break;
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case Op_RMod:
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*dst = op2 % op1;
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break;
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default:
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break;
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}
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}
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static inline void handle_device_read(VM* vm, Reg dst_reg, uint16_t device_id)
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{
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switch (device_id) {
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case Device_Keyboard:
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vm->regs[dst_reg] = vm->keyboard_port_input;
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break;
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default:
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fprintf(stderr, "warning: no input device %d\n", device_id);
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break;
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}
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}
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static inline void handle_device_write(VM* vm, uint16_t op1, uint16_t device_id)
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{
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switch (device_id) {
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default:
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fprintf(stderr, "warning: no output device %d\n", device_id);
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break;
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}
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}
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static inline int handle_interrupt(VM* vm, uint8_t int_id)
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{
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switch ((VM_Int)int_id) {
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case Int_DiskRead: {
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uint16_t addr = vm->regs[R0];
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uint16_t block = vm->regs[R1];
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vm->boot_drive->read(vm->boot_drive, &vm->mem[addr], block);
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break;
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}
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case Int_DiskWrite: {
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uint16_t addr = vm->regs[R0];
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uint16_t block = vm->regs[R1];
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vm->boot_drive->write(vm->boot_drive, &vm->mem[addr], block);
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break;
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}
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default:
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return jump_to_interrupt_handler(vm, int_id);
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}
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return 0;
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}
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static inline int jump_to_interrupt_handler(VM* vm, uint8_t int_id)
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{
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uint16_t* rsp = &vm->regs[Rsp];
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uint16_t* rfl = &vm->regs[Rfl];
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uint16_t* rip = &vm->regs[Rip];
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uint16_t* rcs = &vm->regs[Rcs];
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if ((*rfl >> Fl_Int & 1) == 0) {
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fprintf(stderr, "error: interrupt with unset flag\n");
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vm->regs[Rfl] |= 1 << Fl_Err;
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return -1;
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}
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uint16_t offset = int_id - 32;
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uint16_t int_table_size = *(uint16_t*)&vm->mem[vm->int_table];
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if (offset >= int_table_size) {
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fprintf(stderr, "error: interrupt outside table (%d)\n", int_id);
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vm->regs[Rfl] |= 1 << Fl_Err;
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return -1;
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}
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uint16_t int_addr = *(uint16_t*)&vm->mem[vm->int_table + offset * 2 + 2];
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*rsp += 2;
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*(uint16_t*)&vm->mem[*rsp] = *rcs;
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*rsp += 2;
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*(uint16_t*)&vm->mem[*rsp] = *rip;
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*rcs = 0;
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*rip = int_addr;
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return 0;
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}
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static inline void maybe_update_vcd(VM* vm, uint16_t addr)
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{
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if (!vm->io_device)
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return;
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if ((vm->regs[Rfl] >> Fl_Vcd & 1) == 0)
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return;
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if (!(addr >= VCD_BUFFER_OFFSET
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&& addr < VCD_BUFFER_OFFSET + VCD_BUFFER_SIZE))
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return;
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uint16_t offset = addr - VCD_BUFFER_OFFSET;
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vm->io_device->set_char(vm->io_device, offset, vm->mem[addr]);
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}
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static inline uint16_t eat_uint16(VM* vm)
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{
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uint16_t* rip = &vm->regs[Rip];
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uint16_t ins = read_seg_uint16(vm, *rip);
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*rip += 2;
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return ins;
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}
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static inline uint16_t read_seg_uint16(VM* vm, uint16_t ptr)
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{
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return *(uint16_t*)&vm->mem[vm->regs[Rcs] * vm->seg_size + ptr];
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}
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static inline Op ins_op(uint16_t ins)
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{
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return ins & 0x3F;
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}
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static inline Reg ins_dst_reg(uint16_t ins)
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{
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return ins >> 13 & 0x7;
|
|
}
|
|
|
|
static inline Reg ins_op1_reg(uint16_t ins)
|
|
{
|
|
return ins >> 10 & 0x7;
|
|
}
|
|
|
|
static inline Reg ins_op2_reg(uint16_t ins)
|
|
{
|
|
return ins >> 7 & 0x7;
|
|
}
|
|
|
|
static inline uint16_t ins_op1(VM* vm, uint16_t ins)
|
|
{
|
|
return vm->regs[ins_op1_reg(ins)];
|
|
}
|
|
|
|
static inline uint16_t ins_op2(VM* vm, uint16_t ins)
|
|
{
|
|
return vm->regs[ins_op2_reg(ins)];
|
|
}
|
|
|
|
static inline uint16_t ins_reg_val_or_imm(
|
|
VM* vm, uint16_t ins, uint16_t is_imm_bit, uint16_t reg_bit, uint16_t mask)
|
|
{
|
|
bool is_imm = (ins >> is_imm_bit & 1) != 0;
|
|
if (is_imm) {
|
|
return eat_uint16(vm);
|
|
} else {
|
|
return vm->regs[ins >> reg_bit & mask];
|
|
}
|
|
}
|
|
|
|
static inline uint16_t ins_op1_or_imm(VM* vm, uint16_t ins)
|
|
{
|
|
return ins_reg_val_or_imm(vm, ins, 6, 10, 0x7);
|
|
}
|
|
|
|
static inline uint16_t ins_op2_or_imm(VM* vm, uint16_t ins)
|
|
{
|
|
return ins_reg_val_or_imm(vm, ins, 6, 7, 0x7);
|
|
}
|