#pragma once #include "common/arch.h" #include #include typedef enum { LineTy_Label, LineTy_DataImm, LineTy_DataLabel, LineTy_Nop, LineTy_Hlt, LineTy_Jmp_Reg, LineTy_Jmp_Imm, LineTy_Jmp_Label, LineTy_Jnz_Reg, LineTy_Jnz_Imm, LineTy_Jnz_Label, LineTy_Cmp_Reg, LineTy_Cmp_Imm, LineTy_Cmp_Label, LineTy_Mov8_MemReg_Reg, LineTy_Mov8_MemImm_Imm, LineTy_Mov8_MemImm_Reg, LineTy_Mov16_Reg_Reg, LineTy_Mov16_Reg_Imm, LineTy_Mov16_Reg_MemReg, LineTy_Mov16_Reg_MemImm, LineTy_Mov16_Reg_MemLabel, LineTy_Mov16_MemReg_Reg, LineTy_Mov16_MemLabel_Reg, LineTy_In_Imm, LineTy_Call_Imm, LineTy_Call_Label, LineTy_Ret, LineTy_Lit_Imm, LineTy_Lit_Label, LineTy_Int, LineTy_IRet, LineTy_Or_Imm, LineTy_Xor_Imm, LineTy_And_Imm, LineTy_Shl_Imm, LineTy_RShl_Imm, LineTy_Shr_Imm, LineTy_RShr_Imm, LineTy_Add_Imm, LineTy_Sub_Imm, LineTy_RSub_Imm, LineTy_Mul_Imm, LineTy_IMul_Imm, LineTy_Div_Imm, LineTy_IDiv_Imm, LineTy_RDiv_Imm, LineTy_RIDiv_Imm, LineTy_Mod_Imm, LineTy_RMod_Imm, LineTy_Or_Reg, LineTy_Xor_Reg, LineTy_And_Reg, LineTy_Shl_Reg, LineTy_RShl_Reg, LineTy_Shr_Reg, LineTy_RShr_Reg, LineTy_Add_Reg, LineTy_Sub_Reg, LineTy_RSub_Reg, LineTy_Mul_Reg, LineTy_IMul_Reg, LineTy_Div_Reg, LineTy_IDiv_Reg, LineTy_RDiv_Reg, LineTy_RIDiv_Reg, LineTy_Mod_Reg, LineTy_RMod_Reg, } LineTy; typedef struct { union { int label; struct { uint16_t imm; uint16_t reg; }; }; } Ex; typedef struct { LineTy ty; Ex dst; Ex op1; Ex op2; uint16_t offset; } Line; Line s_label(int label); Line s_data_i(uint16_t data); Line s_data_l(int label); Line s_nop(void); Line s_hlt(void); Line s_jmp_r(Reg op1_reg); Line s_jmp_i(uint16_t op1_imm); Line s_jmp_l(int op1_label); Line s_jnz_r(Reg op1_reg, Reg op2_reg); Line s_jnz_i(Reg op1_reg, uint16_t op2_imm); Line s_jnz_l(Reg op1_reg, int op2_label); Line s_cmp_r(Reg op1_reg, Reg op2_reg); Line s_cmp_i(Reg op1_reg, uint16_t op2_imm); Line s_cmp_l(Reg op1_reg, int op2_label); Line s_mov8_mr_r(Reg dst_reg, Reg op2_reg); Line s_mov8_mi_i(uint16_t dst_imm, uint16_t op2_imm); Line s_mov8_mi_r(uint16_t dst_imm, Reg op2_reg); Line s_mov16_r_r(Reg dst_reg, Reg op2_reg); Line s_mov16_r_i(Reg dst_reg, uint16_t op2_imm); Line s_mov16_r_mr(Reg dst_reg, Reg op2_reg, uint16_t op2_offset); Line s_mov16_r_mi(Reg dst_reg, uint16_t op2_imm); Line s_mov16_r_ml(Reg dst_reg, int op2_label); Line s_mov16_mr_r(Reg dst_reg, uint16_t dst_offset, Reg op2_reg); Line s_mov16_ml_r(int dst_label, Reg op2_reg); Line s_in_i(Reg dst_reg, uint16_t op1_imm); Line s_call_i(uint16_t op1_imm); Line s_call_l(int op1_label); Line s_ret(void); Line s_lit_i(uint16_t op1_imm); Line s_lit_l(int op1_label); Line s_int(uint8_t int_id); Line s_iret(void); Line s_or_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_xor_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_and_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_shl_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_rshl_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_shr_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_rshr_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_add_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_sub_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_rsub_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_mul_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_imul_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_div_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_idiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_rdiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_ridiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_mod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_rmod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm); Line s_or_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_xor_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_and_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_shl_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_rshl_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_shr_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_rshr_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_add_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_sub_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_rsub_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_mul_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_imul_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_div_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_idiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_rdiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_ridiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_mod_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); Line s_rmod_r(Reg dst_reg, Reg op1_reg, Reg op2_reg); #define s_push_r(REG) s_add_i(Rsp, Rsp, 2), s_mov16_mr_r(Rsp, 0, REG) #define s_pop_r(REG) s_mov16_r_mr(REG, Rsp, 0), s_sub_i(Rsp, Rsp, 2) uint16_t assemble_to_binary( uint16_t* out, const Line* lines, size_t lines_size); #define fmt_binary(VAL) \ (VAL) >> 7 & 1 ? '1' : '0', (VAL) >> 6 & 1 ? '1' : '0', \ (VAL) >> 5 & 1 ? '1' : '0', (VAL) >> 4 & 1 ? '1' : '0', \ (VAL) >> 3 & 1 ? '1' : '0', (VAL) >> 2 & 1 ? '1' : '0', \ (VAL) >> 1 & 1 ? '1' : '0', (VAL) >> 0 & 1 ? '1' : '0'