diff --git a/asm/asm.c b/asm/asm.c
index 91371ba..ce18298 100644
--- a/asm/asm.c
+++ b/asm/asm.c
@@ -6,517 +6,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 
-Line s_label(int label)
-{
-    return (Line) {
-        .ty = LineTy_Label,
-        .op1 = (Ex) { .label = label },
-    };
-}
-Line s_data_i(uint16_t data)
-{
-    return (Line) {
-        .ty = LineTy_DataImm,
-        .op1 = (Ex) { .imm = data },
-    };
-}
-Line s_data_l(int label)
-{
-    return (Line) {
-        .ty = LineTy_DataLabel,
-        .op1 = (Ex) { .label = label },
-
-    };
-}
-Line s_nop(void)
-{
-    return (Line) { .ty = LineTy_Nop };
-}
-Line s_hlt(void)
-{
-    return (Line) { .ty = LineTy_Hlt };
-}
-Line s_jmp_l(int op1_label)
-{
-    return (Line) {
-        .ty = LineTy_Jmp_Label,
-        .op1 = (Ex) { .label = op1_label },
-    };
-}
-Line s_jnz_l(Reg op1_reg, int op2_label)
-{
-    return (Line) {
-        .ty = LineTy_Jnz_Label,
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .label = op2_label },
-    };
-}
-Line s_cmp_i(Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Cmp_Imm,
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_mov8_mr_r(Reg dst_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Mov8_MemReg_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_mov8_mi_i(uint16_t dst_imm, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Mov8_MemImm_Imm,
-        .dst = (Ex) { .imm = dst_imm },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_mov8_mi_r(uint16_t dst_imm, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Mov8_MemImm_Reg,
-        .dst = (Ex) { .imm = dst_imm },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_mov16_r_r(Reg dst_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Mov16_Reg_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_mov16_r_i(Reg dst_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Mov16_Reg_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_mov16_r_mr(Reg dst_reg, Reg op2_reg, uint16_t op2_offset)
-{
-    return (Line) {
-        .ty = LineTy_Mov16_Reg_MemReg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-        .offset = op2_offset,
-    };
-}
-Line s_mov16_r_mi(Reg dst_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Mov16_Reg_MemImm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_mov16_r_ml(Reg dst_reg, int op2_label)
-{
-    return (Line) {
-        .ty = LineTy_Mov16_Reg_MemLabel,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op2 = (Ex) { .label = op2_label },
-    };
-}
-Line s_mov16_mr_r(Reg dst_reg, uint16_t dst_offset, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Mov16_MemReg_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-        .offset = dst_offset,
-    };
-}
-Line s_mov16_ml_r(int dst_label, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Mov16_MemLabel_Reg,
-        .dst = (Ex) { .label = dst_label },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_in_i(Reg dst_reg, uint16_t op1_imm)
-{
-    return (Line) {
-        .ty = LineTy_In_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .imm = op1_imm },
-    };
-}
-Line s_call_i(uint16_t op1_imm)
-{
-    return (Line) {
-        .ty = LineTy_Call_Imm,
-        .op1 = (Ex) { .imm = op1_imm },
-    };
-}
-Line s_call_l(int op1_label)
-{
-    return (Line) {
-        .ty = LineTy_Call_Label,
-        .op1 = (Ex) { .label = op1_label },
-    };
-}
-Line s_ret(void)
-{
-    return (Line) { .ty = LineTy_Ret };
-}
-Line s_lit_i(uint16_t op1_imm)
-{
-    return (Line) {
-        .ty = LineTy_Lit_Imm,
-        .op1 = (Ex) { .imm = op1_imm },
-    };
-}
-Line s_lit_l(int op1_label)
-{
-    return (Line) {
-        .ty = LineTy_Lit_Label,
-        .op1 = (Ex) { .label = op1_label },
-    };
-}
-Line s_int(uint8_t int_id)
-{
-    return (Line) {
-        .ty = LineTy_Int,
-        .op1 = (Ex) { .imm = int_id },
-    };
-}
-Line s_iret(void)
-{
-    return (Line) { .ty = LineTy_IRet };
-}
-Line s_or_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Or_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_xor_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Xor_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_and_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_And_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_shl_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Shl_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_rshl_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_RShl_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_shr_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Shr_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_rshr_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_RShr_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_add_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Add_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_sub_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Sub_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_rsub_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_RSub_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_mul_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Mul_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_imul_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_IMul_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_div_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Div_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_idiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_IDiv_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_rdiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_RDiv_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_ridiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_RIDiv_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_mod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_Mod_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_rmod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
-{
-    return (Line) {
-        .ty = LineTy_RMod_Imm,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .imm = op2_imm },
-    };
-}
-Line s_or_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Or_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_xor_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Xor_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_and_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_And_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_shl_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Shl_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_rshl_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_RShl_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_shr_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Shr_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_rshr_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_RShr_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_add_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Add_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_sub_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Sub_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_rsub_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_RSub_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_mul_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Mul_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_imul_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_IMul_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_div_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Div_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_idiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_IDiv_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_rdiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_RDiv_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_ridiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_RIDiv_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_mod_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_Mod_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-Line s_rmod_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
-{
-    return (Line) {
-        .ty = LineTy_RMod_Reg,
-        .dst = (Ex) { .reg = (uint16_t)dst_reg },
-        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
-        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
-    };
-}
-
 static inline void add_dst_reg(uint32_t* ins, uint16_t reg);
 static inline void add_op1_reg(uint32_t* ins, uint16_t reg);
 static inline void add_op2_reg(uint32_t* ins, uint16_t reg);
@@ -528,7 +17,7 @@ static inline uint16_t linety_arithm_ins(LineTy ty);
 
 uint16_t assemble_to_binary(uint16_t* out, const Line* lines, size_t lines_size)
 {
-    bool debug = false;
+    const bool debug = false;
 
     uint16_t ip = 0;
 
diff --git a/asm/asm.h b/asm/asm.h
index dddfc89..e97462f 100644
--- a/asm/asm.h
+++ b/asm/asm.h
@@ -31,7 +31,6 @@ typedef enum {
     LineTy_Lit_Label,
     LineTy_Int,
     LineTy_IRet,
-
     LineTy_Or_Imm,
     LineTy_Xor_Imm,
     LineTy_And_Imm,
@@ -50,7 +49,6 @@ typedef enum {
     LineTy_RIDiv_Imm,
     LineTy_Mod_Imm,
     LineTy_RMod_Imm,
-
     LineTy_Or_Reg,
     LineTy_Xor_Reg,
     LineTy_And_Reg,
@@ -69,7 +67,6 @@ typedef enum {
     LineTy_RIDiv_Reg,
     LineTy_Mod_Reg,
     LineTy_RMod_Reg,
-
 } LineTy;
 
 typedef struct {
@@ -116,7 +113,6 @@ Line s_lit_i(uint16_t op1_imm);
 Line s_lit_l(int op1_label);
 Line s_int(uint8_t int_id);
 Line s_iret(void);
-
 Line s_or_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm);
 Line s_xor_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm);
 Line s_and_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm);
@@ -135,7 +131,6 @@ Line s_rdiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm);
 Line s_ridiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm);
 Line s_mod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm);
 Line s_rmod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm);
-
 Line s_or_r(Reg dst_reg, Reg op1_reg, Reg op2_reg);
 Line s_xor_r(Reg dst_reg, Reg op1_reg, Reg op2_reg);
 Line s_and_r(Reg dst_reg, Reg op1_reg, Reg op2_reg);
diff --git a/asm/ctors.c b/asm/ctors.c
new file mode 100644
index 0000000..efef9db
--- /dev/null
+++ b/asm/ctors.c
@@ -0,0 +1,513 @@
+#include "asm.h"
+#include <stdint.h>
+
+Line s_label(int label)
+{
+    return (Line) {
+        .ty = LineTy_Label,
+        .op1 = (Ex) { .label = label },
+    };
+}
+Line s_data_i(uint16_t data)
+{
+    return (Line) {
+        .ty = LineTy_DataImm,
+        .op1 = (Ex) { .imm = data },
+    };
+}
+Line s_data_l(int label)
+{
+    return (Line) {
+        .ty = LineTy_DataLabel,
+        .op1 = (Ex) { .label = label },
+
+    };
+}
+Line s_nop(void)
+{
+    return (Line) { .ty = LineTy_Nop };
+}
+Line s_hlt(void)
+{
+    return (Line) { .ty = LineTy_Hlt };
+}
+Line s_jmp_l(int op1_label)
+{
+    return (Line) {
+        .ty = LineTy_Jmp_Label,
+        .op1 = (Ex) { .label = op1_label },
+    };
+}
+Line s_jnz_l(Reg op1_reg, int op2_label)
+{
+    return (Line) {
+        .ty = LineTy_Jnz_Label,
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .label = op2_label },
+    };
+}
+Line s_cmp_i(Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Cmp_Imm,
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_mov8_mr_r(Reg dst_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Mov8_MemReg_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_mov8_mi_i(uint16_t dst_imm, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Mov8_MemImm_Imm,
+        .dst = (Ex) { .imm = dst_imm },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_mov8_mi_r(uint16_t dst_imm, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Mov8_MemImm_Reg,
+        .dst = (Ex) { .imm = dst_imm },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_mov16_r_r(Reg dst_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Mov16_Reg_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_mov16_r_i(Reg dst_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Mov16_Reg_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_mov16_r_mr(Reg dst_reg, Reg op2_reg, uint16_t op2_offset)
+{
+    return (Line) {
+        .ty = LineTy_Mov16_Reg_MemReg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+        .offset = op2_offset,
+    };
+}
+Line s_mov16_r_mi(Reg dst_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Mov16_Reg_MemImm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_mov16_r_ml(Reg dst_reg, int op2_label)
+{
+    return (Line) {
+        .ty = LineTy_Mov16_Reg_MemLabel,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op2 = (Ex) { .label = op2_label },
+    };
+}
+Line s_mov16_mr_r(Reg dst_reg, uint16_t dst_offset, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Mov16_MemReg_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+        .offset = dst_offset,
+    };
+}
+Line s_mov16_ml_r(int dst_label, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Mov16_MemLabel_Reg,
+        .dst = (Ex) { .label = dst_label },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_in_i(Reg dst_reg, uint16_t op1_imm)
+{
+    return (Line) {
+        .ty = LineTy_In_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .imm = op1_imm },
+    };
+}
+Line s_call_i(uint16_t op1_imm)
+{
+    return (Line) {
+        .ty = LineTy_Call_Imm,
+        .op1 = (Ex) { .imm = op1_imm },
+    };
+}
+Line s_call_l(int op1_label)
+{
+    return (Line) {
+        .ty = LineTy_Call_Label,
+        .op1 = (Ex) { .label = op1_label },
+    };
+}
+Line s_ret(void)
+{
+    return (Line) { .ty = LineTy_Ret };
+}
+Line s_lit_i(uint16_t op1_imm)
+{
+    return (Line) {
+        .ty = LineTy_Lit_Imm,
+        .op1 = (Ex) { .imm = op1_imm },
+    };
+}
+Line s_lit_l(int op1_label)
+{
+    return (Line) {
+        .ty = LineTy_Lit_Label,
+        .op1 = (Ex) { .label = op1_label },
+    };
+}
+Line s_int(uint8_t int_id)
+{
+    return (Line) {
+        .ty = LineTy_Int,
+        .op1 = (Ex) { .imm = int_id },
+    };
+}
+Line s_iret(void)
+{
+    return (Line) { .ty = LineTy_IRet };
+}
+Line s_or_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Or_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_xor_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Xor_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_and_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_And_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_shl_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Shl_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_rshl_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_RShl_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_shr_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Shr_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_rshr_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_RShr_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_add_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Add_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_sub_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Sub_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_rsub_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_RSub_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_mul_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Mul_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_imul_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_IMul_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_div_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Div_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_idiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_IDiv_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_rdiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_RDiv_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_ridiv_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_RIDiv_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_mod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_Mod_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_rmod_i(Reg dst_reg, Reg op1_reg, uint16_t op2_imm)
+{
+    return (Line) {
+        .ty = LineTy_RMod_Imm,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .imm = op2_imm },
+    };
+}
+Line s_or_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Or_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_xor_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Xor_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_and_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_And_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_shl_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Shl_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_rshl_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_RShl_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_shr_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Shr_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_rshr_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_RShr_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_add_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Add_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_sub_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Sub_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_rsub_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_RSub_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_mul_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Mul_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_imul_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_IMul_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_div_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Div_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_idiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_IDiv_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_rdiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_RDiv_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_ridiv_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_RIDiv_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_mod_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_Mod_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}
+Line s_rmod_r(Reg dst_reg, Reg op1_reg, Reg op2_reg)
+{
+    return (Line) {
+        .ty = LineTy_RMod_Reg,
+        .dst = (Ex) { .reg = (uint16_t)dst_reg },
+        .op1 = (Ex) { .reg = (uint16_t)op1_reg },
+        .op2 = (Ex) { .reg = (uint16_t)op2_reg },
+    };
+}